CELL TRANSISTOR FABRICATION OF D RAM

摘要

PURPOSE: A cell transistor of D ram is provided by reducing an electric field according to a concentration difference through forming a wide doping distribution, and so as to reduce the variation of the impurity distributions in source and drain according to the depths. CONSTITUTION: A fabrication method of a cell transistor in D ram contains the following steps; a step to perform the vapor deposition of the gate formation layers of poly layers on the front top of a substrate; a step to etch the partial top of the residual gate formation layers except the gate formation layers where is located on the middle top of the substrate; a step to use the gate formation layer to be etched on the top as an ion injection buffer, and to form a low concentration source and drain around the bottom of the substrate; a step to form the side walls on the sides of a top region in the remained gate formation layer; a step to remove the gate formation layers which remain on the top of the source and the drain; and a step to form the side wall of the dielectric layer at the side of the gate formation layer in the side wall and the bottom of the source and the drain, and to form a plug which is connected to the source and the drain.