发明名称 ELECTROMAGNETIC INTERFERENCE/ELECTROSTATIC TWARTING BOARD AND DESIGNING METHOD THEREOF
摘要 PURPOSE: An electromagnetic interference/electrostatic twarting board capable of preventing a performance lowering of a system and an external shock and a designing method thereof are provided. CONSTITUTION: An electromagnetic interference/electrostatic twarting board includes a resistor(530), a capacitor(540), clock driver(550), and a filter(510). The resistor(530) is connected to a clock source(520). The capacitor(540) is connected to the resistor(530) in parallel. The clock driver(550) is connected to the resistor(530) and capacitor(540). The filter(510) is connected to the clock driver(550) and removes an electromagnetic interference. A response device is locked into a hole(200). A debug port is locked into a hole(300). The hole(300) is connected to a frame ground(400). The electromagnetic interference/electrostatic twarting board is connected to a back board through a connector(560).
申请公布号 KR20000039215(A) 申请公布日期 2000.07.05
申请号 KR19980054480 申请日期 1998.12.11
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 CHO, HYUNG GEUN
分类号 H05K9/00;(IPC1-7):H05K9/00 主分类号 H05K9/00
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