发明名称 METHOD FOR FLATTENING OF SEMICONDUCTOR DEVICE AND FORMING METHOD USING FLATTENING METHOD
摘要 PURPOSE: A method for flattening of semiconductor device and a forming method using the flattening method is provided to prevent exceeding etching and dishing phenomenon. CONSTITUTION: A gate isolating membrane(21) is formed as a heat oxidation film on a silicon substrate(20) defined as a cell area(c2). A doped polysilicon layer is stuck and a perry area(p2) and nitride(23) is evaporated. Operating photo etching process, a gate line(22) is made by patterning. On the cell area(c2), low density of a source/drain impurity spreading part is built by ion implantation and on the perry part(p2), high density of impurity spreading part is constructed. An oxidation layer(25) is adhered on the substrate(20). A photoresist is made only on the perry part(p2) and a gate side spacer(24) is moulded by operating etchback process on exposed cell area(c2). After making high-density ion implantation, the photoresist is removed. A doped polysilicon layer(26) is created using CVD(Chemical Vapor Deposition) method on the whole substrate(20) for forming contact plug. A supplementary layer(27) is added on the polysilicon layer(26). To obtain plain polysilicon layer(26), an CMP(Chemical Mechanical Polishing) process is executed. By enforcing etchback, a plug is completed in cell part(c2) and the whole part of oxidation layer(25) in perry part(p2) is exposed by erasing all of the polysilicon layer(26).
申请公布号 KR20000040448(A) 申请公布日期 2000.07.05
申请号 KR19980056097 申请日期 1998.12.18
申请人 HYUNDAI MICRO ELECTRONICS CO., LTD. 发明人 PARK, SEONG HYEON
分类号 H01L21/28;(IPC1-7):H01L21/28 主分类号 H01L21/28
代理机构 代理人
主权项
地址