| 摘要 |
PURPOSE: A semiconductor memory device is provided to quickly access by removing a time delay generated by a first NAND gate. CONSTITUTION: An optional cell data among plural cell data is selected by a row address and a column address and is loaded in a data line and a data bar line. The data line and the data bar line are equalized in an equalizing unit(21) and the cell data loaded in the data line and the data bar line is inputted to a sense amplifying unit(22) in a point activated an enable signal of sense amplifier. The amplified cell data is maintained the data until the next data is inputted by feeding to a buffer unit(23). Therefore, one input is a signal of data line amplified form the sense amplifying unit(22), another input is an output signal of second NAND gate(23b) and the other input is an output signal of inverter(23) to reverse the enable signal of sense amplifier in the sense amplifying unit(22). Thereby an output point of buffer unit(23) is decided by using the enable signal of sense amplifier to decide an operation of sense amplifying unit(22). When the enable signal of sense amplifier is activated, an output state of first NAND gate(23a) is changed and the output of data is performed from the buffer unit(23) without a delay of signal in a point changed a state of data bar line.
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