发明名称 DIVISION CIRCUIT USING FREQUENCY MULTIPLIER
摘要 PURPOSE: A division circuit using frequency multiplier is provided to maintain duty ratio by 50% even in odd division, thereby enhancing the stability of signals and being adapted to a circuit simultaneously used in up/down edges. CONSTITUTION: A division circuit using frequency multiplier comprises a frequency multiplier(30), a modulo(40) and a signal inverter(50). The frequency multiplier(30) outputs signals having two times frequency of input signal. The modulo(40) outputs corresponding pulse signals when the number of up edges of signals output from the multiplier is arrived to a preset number. The signal inverter(50) inverts the state of output signals whenever the pulse signals output from the modulo are input.
申请公布号 KR20000040634(A) 申请公布日期 2000.07.05
申请号 KR19980056309 申请日期 1998.12.18
申请人 LG INFORMATION & COMMUNICATIONS LTD. 发明人 LEE, JEONG BEOM
分类号 H03L7/00;(IPC1-7):H03L7/00 主分类号 H03L7/00
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