JITTER ABSORPTION AND SERIAL-PARALLEL CONVERSION DEVICE

摘要

PURPOSE: A jitter absorption and serial-parallel conversion device is provided to simplify a structure of a circuit by combining an elastic buffer and a serial-parallel converter. CONSTITUTION: A jitter absorption and serial-parallel conversion device comprises a timing signal generator(102), a first and a second shift register(101,102), a 2:1 selector(104), a 1 byte register(105), and a 2 byte register(106). The timing signal generator generates a selection signal and a parallel load signal as a timing signal. The first and the second shift registers comprise a first to a fourth flipflop to store serial data. The 2:1 selector outputs selectively the input data stored in the first and the second shift registers. The 1-byte register converts the data output from the 2:1 selector to parallel data. The 2 byte register latches the parallel data output from the 1 byte register.