2.048 MHz clock converter to line signal at 2.048 Mbit/s

摘要

The clock converter from 2.048 MHz to a line signal at 2.048 Mbit/s is a unit meant to generate a PCM signal frame at 2.048 Mbit/s from a 2.048 MHz input clock. The PCM frame signal with Cyclic Redundancy Code (CRC) created by this unit, although it does not carry data traffic, does carry information on the phase of the input clock. It is provided with eight data outputs synchronised in phase with the 2.048 MHz input clock. The input interface as well as the eight PCM output frames comply with recommendations G.703, G.704 and G.706 of the ITU-T. In addition, it is provided with an alarm signal which is activated in the event that the 2.048 MHz clock signal disappears from the input of the converter. <IMAGE>