发明名称 |
METHOD OF FORMING MULTILAYER GATE ELECTRODE OF SEMICONDUCTOR DEVICE |
摘要 |
PURPOSE: A method of forming multilayer gate electrode of a semiconductor device is provided to prevent a generation of void within polysilicon layers for the heat treatment process after patterning the multilayer gate electrode. CONSTITUTION: A method comprises the steps of: dividing a substrate(100) into activated and inactivated parts by a field oxide layer(102); forming a gate insulation film(104), a polysilicon layer(106), and a first insulation film(108) on the semiconductor substrate(102); etching the first insulation film(108) with CMP(chemical mechanical polishing) so as to leaving the first insulation film on the active region only; forming a metal silicide layer on the resultant; and forming the multilayer gate electrode and polysilicon layer sequentially after etching the first insulation film(108). Thereby, it is possible to suppress a reaction between the metal silicide layer and the polysilicon layer, for the later heat treatment process, and to prevent a generation of the void within the polysilicon layer.
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申请公布号 |
KR20000040764(A) |
申请公布日期 |
2000.07.05 |
申请号 |
KR19980056489 |
申请日期 |
1998.12.19 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
HONG, SEOK WOO;LEE, CHI HOON;KWON, JOON MO |
分类号 |
H01L21/28;(IPC1-7):H01L21/28 |
主分类号 |
H01L21/28 |
代理机构 |
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地址 |
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