| 摘要 |
<p>1381103 D.C. - D.C. conversion LICENTIA PATENT-VERWALTUNGS GmbH 16 Dec 1971 [24 Dec 1970] 58576/71 Heading H2F [Also in Division H3] In a line deflection circuit a parallel resistorcapacitor combination 19, 20 in series with the current path of the deflection circuit is charged from a winding 15 of the line output transformer via a diode 18 to limit the voltage across the transistor 9 to a safe level. A stabilized supply stage 2 provides a working voltage from the mains. The resistor 19 (24, Fig. 2, not shown) may be shunted by other circuitry (25) in a television receiver using the invention. The earthed end of capacitor 6 may be connected alternatively to the terminal 23 so that if the resistor 19 is short circuited temporarily the voltage across the deflection circuit remains constant. A resistive path (Fig. 2, not shown) from 23 to a control circuit of stage 2 provides negative feedback to reduce + U B if the deflection circuit is short circuited. A diode (28) may be included in the path such that a fall in the potential at 23 does not lower +U B . The stage 2 may include current limiting.</p> |
