| 摘要 |
PROBLEM TO BE SOLVED: To improve breakdown strength against surge of a power insulating gate-type semiconductor device, such as a UMOS. SOLUTION: An n-type semiconductor region 3, p-base regions 4 arranged in the n-type semiconductor region 3, groove parts formed shallower than the deepest parts in the p-base regions 4, n+-source regions 5 arranged on the surfaces of the p-base regions 4, an n+-embedded drain region 2 arranged under the p-base region 4, gate insulating films 6 formed on the sidewalls of the groove part and control electrodes 7 embedded in the groove parts are installed. An n-type pull-out region (sinker) 8 reaching the n+-embedded drain region 2 from the surface of the n-type semiconductor region 3 is provided. The base corner parts of the groove parts are covered by the p-base regions 4, and the centers of the base parts of the groove parts are brought into contact with the n-type semiconductor region 3. |
