发明名称 Layered counterflow pipeline processor with anticipatory control
摘要 A layered counterflow pipeline structure is described in which sub-tasks performed at each stage in a counterflow pipeline processor are separated into different layers. As words flow through the counterflow pipeline processor, they are divided into partial words which are supplied to the different layers, GET, CHECK and PROCESS, for appropriate handling by that portion of each stage. In the GET layer, partial words passing through each stage are analyzed to determine whether they constitute an encounter pair. In the CHECK layer a determination is made as to whether the word selected by the GET layer requires further modification. Finally, in the PROCESS layer operations are performed on the words themselves based upon control messages from the other layers. The layers of the processor communicate with each other using suitable communication paths such as First In First Out registers.
申请公布号 US6085316(A) 申请公布日期 2000.07.04
申请号 US19980123587 申请日期 1998.07.28
申请人 SUN MICROSYSTEMS, INC. 发明人 SUTHERLAND, IVAN E.;MOLNAR CHARLES E.;JONES, IAN W.;COATES, WILLIAM S.;LEXAU, JON
分类号 G06F9/38;G06F15/78;G06F15/80;(IPC1-7):G06F9/38;G06F9/28;G06F13/40 主分类号 G06F9/38
代理机构 代理人
主权项
地址