发明名称 |
Dynamic logic circuit with bitline repeater circuit |
摘要 |
A dynamic logic circuit is provided. The dynamic logic circuit includes at least one bitline. At least one repeater circuit is inserted into each bitline. The bitline repeater circuit includes an inverter and at least one transistor. The inverter is activated by the bitline starting to discharge and the activated inverter turns on the bitline repeater circuit transistor which discharges the bitline. The dynamic logic circuit including the bitline repeater circuit provides improved performance and decreased power consumption.
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申请公布号 |
US6084810(A) |
申请公布日期 |
2000.07.04 |
申请号 |
US19990233268 |
申请日期 |
1999.01.19 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
STORINO, SALVATORE N.;UHLMANN, GREGORY JOHN |
分类号 |
G11C7/12;(IPC1-7):G11C7/00 |
主分类号 |
G11C7/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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