发明名称 System and method for multi-mode low power voltage regulator
摘要 A voltage regulator that has a first mode circuit having a gating device and an amplifier, the gating device with a first input for receiving a first voltage, a second input, and an output. The amplifier is configured to receive a reference voltage and the gating device output as the second input. The gating device is configured to receive an amplifier output at said second input and responsive thereto to couple the first voltage with the gating device output when the gating device output is within a voltage range. The voltage regulator also has a second mode circuit having a voltage divider with an output. The voltage divider is configured to received the first voltage and supply a second voltage to the voltage divider output. The invention also relates to an integrated circuit having a power bus line and at least two voltage regulator cells coupled to the power bus line.
申请公布号 US6084385(A) 申请公布日期 2000.07.04
申请号 US19990337747 申请日期 1999.06.22
申请人 INTEL CORPORATION 发明人 NAIR, RAJ
分类号 G05F1/575;(IPC1-7):G05F1/575 主分类号 G05F1/575
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