| 摘要 |
<p>PROBLEM TO BE SOLVED: To enable data transmission of the same capacity as in conventional transmission between chips and circuit blocks using a small number of bus lines by providing a transmitting circuit and a receiving circuit in which the chips or circuit blocks share a clock line for synchronization and perform multiplex transmission of digital data by using a bus line. SOLUTION: The chips 1 or circuit blocks of the integrated circuit device have transmitting circuits and receiving circuits which share the clock line 3 for synchronization and perform multiplex transmission of data by using the bus line 2. The chips or circuit blocks of this integrated circuit device perform the multiplex transmission of the data using the bus line 2. Plural pieces of data can be sent and received by using bus lines less in number than them (e.g. one). That is, the chips 1, 1... performs the multiplex transmission of the data by using a single bus line 2. Thus, the number of bus lines 2 is decreased by performing the multiple transmission of the data and the area and power are saved.</p> |
