| 摘要 |
PROBLEM TO BE SOLVED: To realize a reset circuit with less power consumption that stably outputs a reset signal to initialize a circuit at application of power. SOLUTION: The reset circuit consists of an inverter consisting of a P-channel enhancement FET 4 and an N-channel FET 5 and a differentiation circuit consisting of a capacitor 3 and a resistor 2, where an output signal of the differentiation circuit is given to an input stage of the inverter. An absolute value|VTP|of a threshold voltage VTP of the P-channel enhancement FET and a threshold voltage VTN of the N-channel enhancement FET are selected so that the threshold voltage VTN of the N-channel enhancement FET is higher than a value (1st potential-|VTN|). Thus, the reset circuit can generate a reset signal stably at application of power with the circuit configuration of less power consumption.
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