| 摘要 |
A semiconductor integrated circuit has a dummy gate electrode layer formed on a semiconductor substrate, with a gate insulation film interposed. On the first layer insulation film formed on the top of the dummy gate electrode layer, the first signal line is arranged, intersecting with the dummy gate electrode material layer substantially at right angles. On the second layer insulation film formed on the first signal line, a power-supply wiring layer is arranged, extending substantially parallel, and is located right above the dummy gate electrode layer. A contact hole is provided, electrically connecting the power-supply layer to the dummy gate electrode layer.
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