发明名称 System for memory error handling
摘要 A computer system stores data according to a plurality of different error handling schemes. The computer system includes a memory controller with a plurality of different error handling modules, each of which can be selectively associated with one or more memory blocks. Each of the error handling modules is structured to write data to and read data from its associated memory block according to a different error handling scheme. A memory controller includes a separate configuration register for each of the plurality of memory blocks. Each configuration register stores an indication of the error handling module that will be employed to write data to and read data from the memory block associated with the configuration register.
申请公布号 US6085339(A) 申请公布日期 2000.07.04
申请号 US19980201277 申请日期 1998.11.30
申请人 MICRON ELECTRONICS, INC. 发明人 JEDDELOH, JOSEPH
分类号 G06F11/00;G06F11/10;(IPC1-7):G06F11/00 主分类号 G06F11/00
代理机构 代理人
主权项
地址