发明名称 |
Method and apparatus for performing an operation multiple times in response to a single instruction |
摘要 |
A method for operating a Reduced Instruction Set Computer (RISC) processor that executes mormal RISC instructions and special RISC instructions. The method comprises the step of controlling the RISC processor to perform a single operation, using a single functional unit for each RISC processor, in response to each normal RISC instruction. The method also comprises the step of controlling the RISC processor to perform multiple operations, using multiple functional units of the RISC processor in parallel, in response to each special RISC instruction.
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申请公布号 |
US6085310(A) |
申请公布日期 |
2000.07.04 |
申请号 |
US19970987290 |
申请日期 |
1997.12.09 |
申请人 |
MICRON TECHNOLOGY, INC. |
发明人 |
PETERSON, JAMES;POOLE, GLENN C.;SRITI, MOHAMMED |
分类号 |
G06F9/30;G06F9/32;G06F9/38;(IPC1-7):G06F9/44;G06F9/302 |
主分类号 |
G06F9/30 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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