发明名称 |
Method of forming unlanded via hole |
摘要 |
An improved method of fabricating an unlanded via hole on a semiconductor substrate is provided. A conductive line and a patterned anti-reflection coating layer are sequentially formed on the substrate wherein the patterned anti-reflection coating layer has a smaller width than the conductive line and a portion of the conductive layer is exposed by the patterned anti-reflection coating layer. A planarized dielectric layer is formed over the substrate to cover the patterned anti-reflection coating layer and the conductive line. A via hole is formed in the planarized dielectric layer to expose portions of surface and sidewalls of the patterned anti-reflection coating layer as well as the conductive line.
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申请公布号 |
US6083825(A) |
申请公布日期 |
2000.07.04 |
申请号 |
US19990329113 |
申请日期 |
1999.06.09 |
申请人 |
UNITED SEMICONDUCTOR CORP. |
发明人 |
LIN, JY-HWANG;HO, YUEH-FENG;WANG, PEI-JEN |
分类号 |
H01L21/3213;H01L21/768;(IPC1-7):H01L21/476 |
主分类号 |
H01L21/3213 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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