发明名称 Digital multiplier with multiplier encoding involving 3X term
摘要 A digital parallel multiplier having encoders for each segmented bit pair of the multiplier input data and which selects one of 4 coefficients, based on the sum of the bit pair, that are then applied to the multiplicand input data. When a 3X coefficient of the multiplicand input data is to be generated, a -1 coefficient is output by the encoder requiring the 3X coefficient, and a 1 is added to the sum of the next most significant bit pair.
申请公布号 US6085214(A) 申请公布日期 2000.07.04
申请号 US19970923693 申请日期 1997.09.04
申请人 CIRRUS LOGIC, INC. 发明人 DE ANGEL, EDWIN
分类号 G06F7/52;(IPC1-7):G06F7/52 主分类号 G06F7/52
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