Clock phase adjustment between duplicated clock circuits,申请号EP19930309586-传众专利搜索

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发明名称	Clock phase adjustment between duplicated clock circuits
摘要
申请公布号	EP0601777(B1)	申请公布日期	2000.06.28
申请号	EP19930309586	申请日期	1993.12.01
申请人	AT&T CORP.	发明人	BORTOLINI, JAMES ROBERT
分类号	H04L7/00;G06F1/12;H04L7/02;H04Q11/04;(IPC1-7):G06F1/12	主分类号	H04L7/00
代理机构		代理人
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