Cell plate voltage generator of a semiconductor memory device

摘要

A cell plate voltage generator of a semiconductor memory device for selectively providing a cell plate potential having various voltages to thereby substantially reduce the time required for a burn-in test includes a half Vdd generation block for producing a half voltage having a half of an external potential inputted from outside of the semiconductor memory device; a Vbb generation block for generating a negative voltage; a cell plate voltage selection block for generating a plurality of control signals; a transmission block having a plurality of transmission circuits for delivering selectively the half voltage, the negative voltage, the source voltage, and the ground voltage in accordance with the control signals; and a level shifter for level shifting at least two of the control signals in order to avert the voltage drop in threshold voltages of the transmission circuits.