发明名称 Semiconductor device
摘要 To suppress the power-on current flowing when power is tuned on in the circuit which feeds precharging current to the bit lines of the banks in a synchronous DRAM comprising a multi-bank structure. The device comprises a plurality of bank circuits BKi which are all of the same structure, wherein the bit line precharging power supply lines which the respective bank circuits have are connected in common, a first precharging power supply circuit which has its output node connected to the precharging power supply line and starts its precharging current feed operation when the power supply in the DRAM chip is turned on, and a second precharging power supply circuit which has its output node connected to the precharging power supply line and starts its precharging current feed operation after the bit line has been raised to a predetermined potential by the precharging current of the first precharging power supply circuit.
申请公布号 US6081468(A) 申请公布日期 2000.06.27
申请号 US19990353856 申请日期 1999.07.15
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 TAIRA, TAKASHI;IMAI, KIMIMASA
分类号 G11C11/409;G11C7/12;G11C11/401;G11C11/407;G11C11/4074;G11C11/4094;(IPC1-7):G11C7/00;G11C8/00 主分类号 G11C11/409
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