摘要 |
To suppress the power-on current flowing when power is tuned on in the circuit which feeds precharging current to the bit lines of the banks in a synchronous DRAM comprising a multi-bank structure. The device comprises a plurality of bank circuits BKi which are all of the same structure, wherein the bit line precharging power supply lines which the respective bank circuits have are connected in common, a first precharging power supply circuit which has its output node connected to the precharging power supply line and starts its precharging current feed operation when the power supply in the DRAM chip is turned on, and a second precharging power supply circuit which has its output node connected to the precharging power supply line and starts its precharging current feed operation after the bit line has been raised to a predetermined potential by the precharging current of the first precharging power supply circuit.
|