Semiconductor integrated circuit device

摘要

A semiconductor integrated circuit device has a plurality of functional blocks. Each of the plurality of functional blocks comprises a DLL circuit for outputting a clock signal, at least one wiring portion for receiving the clock signal at one end thereof, and at least one load circuit for receiving the clock signal from the DLL circuit via the wiring portion. The DLL circuit receives a reference clock signal and a wiring portion and outputs the clock signal so that the phase difference between the reference clock signal and the second clock signal is a predetermined value. Thus, clock skew is reduced even if there is variation due to process.