发明名称 Shared buffer memory architecture for asynchronous transfer mode switching and multiplexing technology
摘要 An ATM switch including a multi-port memory is described. The multi-port memory having a dynamic random access memory (DRAM) and a plurality of input and output serial access memories (SAMs). Efficient, flexible transfer circuits and methods are described for transferring ATM data between the SAMs and the DRAM. The transfer circuits and methods include helper flip/flops to latch ATM data for editing prior to storage in the DRAM. Editing of ATM data transferred from the DRAM is also described. Dynamic parity generation and checking is described to detect errors induced during switching.
申请公布号 US6081528(A) 申请公布日期 2000.06.27
申请号 US19970806827 申请日期 1997.02.26
申请人 MICRON TECHNOLOGY, INC. 发明人 THOMANN, MARK R.
分类号 H04Q3/00;H04L12/56;H04Q11/04;(IPC1-7):G11C29/00 主分类号 H04Q3/00
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