发明名称 Resynchronization of data
摘要 A network node for receiving a packet of data written from the network and providing the packet to the network. The packet of data includes first data received from the network in response to a first clock signal and second data provided to the network in response to a second clock signal. The node is adapted to compensate for a drift between the first clock signal and the second clock signal. The node includes a first counter that receives the first clock signal and produces a write-point signal in response to the first clock signal. The node also includes a plurality of registers arranged in a wrap-around configuration, with a first one of the registers coupled to be selected by the write-point signal to receive the first data from the network. A second counter receives the second clock signal and produces a read-point signal in response to the second clock signal, with a further register being selected by the read-point signal to provide the second data to the network. A comparison block receives the read-point signal and the write-point signal and compares the read-point signal and the write-point signal to detect the drift between the first clock signal and the second clock signal, and generates an output signal representing the drift. A control block receives the output signal from the comparison block and generates a signal to the second counter to adjust the read-point signal to compensate for the drift between the first and the second clock signals.
申请公布号 US6081538(A) 申请公布日期 2000.06.27
申请号 US19970895818 申请日期 1997.07.17
申请人 UNISYS CORPORATION 发明人 DONLEY, GREGGORY D.
分类号 H04J3/06;H04L12/42;(IPC1-7):H04J3/06 主分类号 H04J3/06
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