发明名称 Voltage setpoint error reduction
摘要 A precision voltage regulator comprises a three terminal regulator coupled to a voltage divider. The voltage divider has two composite resistors, each of which comprises a plurality of matched value resistors fabricated on a common substrate, mixed in series and parallel configurations. The resultant voltage divider produces a wide range of divider ratios, while preserving a divider ratio which is independent of temperature and tolerance effects.
申请公布号 US6081106(A) 申请公布日期 2000.06.27
申请号 US19980138583 申请日期 1998.08.21
申请人 CISCO TECHNOLOGY, INC. 发明人 CAMERLO, SERGIO D.
分类号 G05F1/56;(IPC1-7):G05F1/44 主分类号 G05F1/56
代理机构 代理人
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