发明名称 FERRO ELECTRIC MEMORY DEVICE
摘要 PURPOSE: A ferro electric memory device is provided to store three-value data to one ferro electric capacitor and to read the stored three-value data. CONSTITUTION: A ferro electric memory device comprises a data control part(300) which consists of a DA converting part(21), an AD converting part(23), an NMOS transistor(25), two switches(27a,27b) and a control switch(29). The DA converting part(21) has two input terminals(21a,21b) connected to receive 2-bit data, and outputs a four-value write analog voltage in proportion to the inputted digital value. The input terminal(21a) is connected to either one of input data (Din2) and output data (Dout2) through the select switch(27a). The input terminal(21b) is connected to either one of input data (Din1) and output data (Dout1) through the select switch(27b). An output terminal(21c) of the DA converting part(21) is connected to a bit line(BL) through the control switch(29), which is on and off by a DA enable signal(DAE) in order to connect and isolate the output terminal(21c) and the bit line(BL). A drain electrode of the transistor(25) is connected to the bit line(BL), and a source electrode thereof is grounded, and a gate electrode is connected to receive an initialization signal(INT). The AD converting circuit(23) receives a potential on the bit line(BL), and outputs the output data (Dout1,Dout2) in response to the signals(DAE,INT).
申请公布号 KR20000034852(A) 申请公布日期 2000.06.26
申请号 KR19990018240 申请日期 1999.05.20
申请人 FUJITSU LTD. 发明人 NUNOKAWA HIDEO
分类号 G11C14/00;G11C11/22;G11C11/24;G11C11/56;G11C27/00;(IPC1-7):G11C11/24 主分类号 G11C14/00
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