| 摘要 |
PURPOSE: A high-speed, high-reliability and high-performance semiconductor device is provided to have a high-quality copper or silver wiring filled in via holes and/or wiring grooves. CONSTITUTION: After via holes(13) and/or wiring grooves(12) are formed in an interlayer dielectric layer(8,11), barrier layers(15,16) are selectively and successively formed on a base plate in the via holes(13) and/or the wiring grooves(12). Next, the via holes(13) and/or the wiring grooves(12) are filled with a copper or silver layer(17) by electroplating. A chemical-mechanical polish(CMP) is then performed on the copper or silver layer(17), so that the copper or silver wiring(17) within the via holes(13) and/or the wiring grooves(12) are obtained. The barrier layers(15,16) may use one of Ti, Rh, Pt, TiN/Ti, TiN/Rh, and TiN/Pt. Moreover, SiN or SiON covers inner walls of the via holes(13) and/or the wiring grooves(12).
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