| 摘要 |
PURPOSE: A phase detector is provided to minimize a spurious synchronization between a division reference frequency signal phase and a division voltage control oscillation frequency signal phase by deflecting a charge pump into a negative direction. CONSTITUTION: A phase detector comprises a first flip flop(302), a second flip flop(310) and a reset circuit(306) The first flip flop(302) has a first terminal(D) connected to receive a reference voltage, a second terminal(CLK) connected to receive a reference frequency signal, a third terminal(R) connected to a reset signal, and a fourth terminal(Q) operated to generate a first output signal. The second flip flop(310) has a first terminal(D) connected to receive the reference voltage, a second terminal(CLK) connected to receive a voltage controlled oscillation frequency signal, a third terminal(R) connected to the reset signal, and a fourth terminal(Q) operated to generate a second output signal. The reset circuit(306) has a first terminal connected to receive the first output signal, a second terminal connected to receive the second output signal and a third terminal connected to generate the reset signal. An inverted version of the second output signal(Q) is used to control a current source(310).
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