发明名称
摘要 <p>PROBLEM TO BE SOLVED: To properly reject transmission waiting data which cannot be discriminated and to store received cell data in an idle shared memory area. SOLUTION: Idle buffer queues 100 and 200 are those of address data formed of idle buffers in a shared memory. Remaining quantity display counters 10 ad 20 display the remaining quantity of address data in the idle buffer queues 100 and 200. Lending possible threshold display registers 11 and 21 display lending lower limit values to the other system reception port of the idle buffer. Idle buffer queue usable threshold display registers 12 and 22 display lower limit values that can supply address data of the idle buffer of a self-system reception port can. Use possible judgment circuits 16 and 26 limit the number of address data taken out from the idle buffer queues 100 and 200 based on the remaining quantity of address data. Lending possible judgment circuit 15 and 25 limit the lending number of address data to the other system reception port.</p>
申请公布号 JP3056182(B2) 申请公布日期 2000.06.26
申请号 JP19980349162 申请日期 1998.12.08
申请人 发明人
分类号 H04Q3/00;H04L12/28;H04L12/801;H04L12/879;H04L12/883;H04L12/911;H04L12/931;(IPC1-7):H04L12/28 主分类号 H04Q3/00
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