METHOD FOR FORMING SUB-CRITICAL CONTACT SELF-ALIGNED WITH WIRING

摘要

PURPOSE: In a semiconductor integrated circuit chip, a method is provided for forming contact holes self-aligned with metal wiring patterns. CONSTITUTION: A thick dielectric layer(12) is formed on a substrate(10) and then a thin hard mask layer(14) is formed on the dielectric layer(12). A first photoresist layer is formed on the hard mask layer(14), exposed through a first mask, and developed, so that parallel and linear patterns of the photoresist layer are obtained on the hard mask layer(14). Next, the hard mask layer(14) is selectively etched through the patterns of the photoresist layer, so that a portion of the dielectric layer(12) is exposed through the etched hard mask layer(14). After that, the photoresist layer is removed. Successively, on the etched hard mask layer(14) and the exposed dielectric layer(12), a second photoresist layer is formed, exposed through a second mask, and developed to form a pattern. Next, the dielectric layer(12) is selectively etched through both the pattern of the second photoresist layer and the hard mask layer(14), so that trench recesses for metal wiring are formed. After the second photoresist layer is removed, the dielectric layer(12) is further etched to the top of the substrate(10), and sub-critical contact hole recesses(22) deeper than the trench recesses are formed thereby. The recesses are then filled with a metal.