发明名称 FAULT PROCESSING SYSTEM AND METHOD
摘要 PROBLEM TO BE SOLVED: To restart the input/output instruction that is executed by an input/ output processor in the case of occurrence of a host bridge fault without ending abnormally the input/output instruction. SOLUTION: Each of three input/output processors 200 has an input/output instruction section 201 and a fault processing section 202. Every host bridge 100 is placed in 1:1 to every processor 200 and controls the interface between a CPU 400 and the processor 200. A fault notification means 103 notifies the processor 200 of the fault of the bridge 100. Every the fault processing section 202 collects and analyzes the information on the fault of the bridge 100 and recovers this bridge. Every the instruction section 201 stops temporarily the input/output instruction under execution and then restarts it after executing the fault processing by the fault processing section 202 and the bridge 100 is recovered.
申请公布号 JP2000172578(A) 申请公布日期 2000.06.23
申请号 JP19980348120 申请日期 1998.12.08
申请人 NEC ENG LTD 发明人 MATABE KENJI
分类号 G06F15/177;G06F13/00;(IPC1-7):G06F13/00 主分类号 G06F15/177
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