| 摘要 |
PROBLEM TO BE SOLVED: To suppress picture quality from being deteriorated by jitter due to the fluctuation of delay values which is generated by noise or the like by providing a first PLL circuit to which the output of a first voltage controlled oscillation circuit is inputted and a second PLL circuit to which the output of a second voltage controlled oscillation circuit is inputted. SOLUTION: A Hsync signal 18 is inputted to the phase comparator circuit 3 in a PLL circuit 1 and the phase of the signal is compared with the output of a 1/N frequency divider 6 and an error output, that is, the output of the comparator 3 is smoothed in a LPF 4 and the oscillation frequency of a VOC 5 is controlled by the voltage of the outout of the LPF 4. Similarly, also in a PLL circuit 2, the phase of the output of an M-level programmable decoder 7 is compared with an FGP signal 17 which is generated in a CRT 13 by a phase comparator 9 and an error output, that is, the output of the comparator 9 is smoothed in a LPF 10 and the oscillation frequency of a VOC 11 is controlled by the voltage of the output of the LPF 10.
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