发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To prevent the floating of the low level of data signals due to a ground offset at the time of connecting plural semiconductor integrated circuits provided with a back flow prevention means between a ground line and an external terminal for exterior pull-down resistor connection to common bus wiring. SOLUTION: For this semiconductor integrated circuit, a back flow prevention circuit 3A is constituted of an nMOS transistor Q2A for which a source electrode and a back gate electrode are connected and both connected to a pull- down terminal 8A, a drain electrode is connected to the ground line 6A and the source electrode and a gate electrode are connected through a resistor R2A, a pMOS transistor Q1A connected so as to form a current route between a power source line 5A and the gate electrode of the nMOS transistor Q2A and a comparator 4A for judging the height of the potential of a bus terminal 7A with the potential of the ground line 6A as a comparison reference, converting a judged result to an inverted binary signal and inputting it to the gate electrode of the pMOS transistor Q1A.
申请公布号 JP2000174603(A) 申请公布日期 2000.06.23
申请号 JP19980344169 申请日期 1998.12.03
申请人 NEC IC MICROCOMPUT SYST LTD 发明人 YOKOZAWA KOJI
分类号 H03K19/0175;(IPC1-7):H03K19/017 主分类号 H03K19/0175
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