| 摘要 |
<p>PROBLEM TO BE SOLVED: To enlarge the permission limit of delay on a data signal against a clock signal and to facilitate time divisional multiplex transmission in the device of a large scale. SOLUTION: Slave stations relaying external clocks from a master station, when the master station and n-pieces of slave stations are connected by time divisional multiplex transmission are provided with clock data relay circuits 11 (21,..., n1). The clock data relay circuits are provided with n-pieces of delay circuits 11-11, 11-12,..., 11-1n,..., n1-1n. Then, delay time is reduced in accordance with the time slot order of the slave stations and data are inputted/outputted.</p> |
