| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor memory in which yield can be improved by changing a row address and a column address specifying a memory cell when a defective region occurs in a memory cell in a manufacturing process. SOLUTION: This semiconductor memory is provided with a memory cell, a row address latch circuit 102 for specifying an address in this memory cell, a row decoder 106 decoding a row address from this latched row address, a column address latch circuit 103, and a column decoder 107 decoding a column address from this latched column address. In this case, when a defective region occurs in the memory, this defective region is not used, a use region is made 1/2n of a whole region (n is integer of 1 or more), and an address allotting circuit 108 for changing an address of a use region is arranged.
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