发明名称 DATA LINE DRIVE CIRCUIT OF MATRIX DISPLAY
摘要 PROBLEM TO BE SOLVED: To provide a data line drive circuit having a small wiring area and a high charge collection efficiency. SOLUTION: This data line drive circuit is provided with an S/H circuit, an R/W circuit, an output circuit, and a charge collection circuit 4 utilizing an L/C resonance circuit for switching connection of a column line collecting a panel voltage, and reusing it, and shares the voltage supply wiring of the output circuit in supplying and collecting charges, and the wiring is connected with the charge collection circuit 4 to change over the power supply and the charge collection route, and the switching of the column line is performed by an amplifying element constituting an output stage of the output circuit. Moreover, the shared wiring are divided into blocks of the odd numbered columns and the even numbered columns or those of red display columns, green display columns, and blue display columns.
申请公布号 JP2000172231(A) 申请公布日期 2000.06.23
申请号 JP19980341892 申请日期 1998.12.01
申请人 MITSUBISHI ELECTRIC CORP 发明人 URAKABE TAKAHIRO;HASHIDO RYUICHI;SUZUKI AKIHIRO;IWATA AKIHIKO
分类号 G09G3/36;G02F1/133;G09G3/20;(IPC1-7):G09G3/36 主分类号 G09G3/36
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