发明名称 ERROR CORRECTION SYSTEM
摘要 PROBLEM TO BE SOLVED: To shorten the required time for access at read operation of a flash memory or the like provided with the ECC(error correcting code) circuit of a serial processing type and a memory card or the like loaded with it while performing miniaturization and reduction of the cost. SOLUTION: For this error correction system, the semiconductor memory of the flash memory or the like loaded on the memory card or the like is provided with a data register DR having a serial/parallel conversion circuit for successively selecting holding read data and check bits by prescribed combination and transmitting them to a pair of output signal routes provided with main sense amplifiers MSA and MSB, the c pieces, that is two pieces, of the ECC circuits ECCA and ECCB of the serial processing type provided corresponding to the output signal routes for generating prescribed syndromes based on the rear data and the check bit transmitted through the corresponding output signal routes and then correcting the error of the rear data transmitted again based on the syndromes and a data input/output circuit IOC for combining the read data outputted while receiving error correction by the ECC circuits in a prescribed order and outputting them from data input/output terminals IO0-IO7.
申请公布号 JP2000174639(A) 申请公布日期 2000.06.23
申请号 JP19980351014 申请日期 1998.12.10
申请人 HITACHI LTD 发明人 ISHII TATSUYA;KATO AKIRA
分类号 G06F11/10;G11C16/06;G11C29/00;G11C29/42;H03M13/00 主分类号 G06F11/10
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