| 摘要 |
PROBLEM TO BE SOLVED: To prevent a relative time delay from being caused between both a horizontal synchronizing signal and a vertical synchronizing signal by employing three signal wires for a computer display monitor, compounding signals, sending/receiving all the compounded signals to/from the monitor through the three signal wires and recovering the polarity of the horizontal synchronizing signal and the vertical synchronizing signal. SOLUTION: An original horizontal synchronizing signal (H) and an original vertical synchronizing signal (V) are delayed by a time t1 to generate a delayed horizontal synchronizing signal (Hd) and a delayed vertical synchronizing signal (Vd). A time relation between the video signal and the Hd, Vd indicates a delay of time t1 and the delay time t1 is selected so that not causing any practical hindrance. Then a control signal (CTL), which is a reference of compounding signals, is generated. The signal CTL includes the signals Hd, Vd and reaches a low level just before the signals Hd, Vd change and returns to a high level just after the change in the signals Hd, Vd is finished. A leading edge of the signal CTL is generated without any delay from the signals H, V and its trailing edge is set within a margin time of a video signal blanking period. The relative time difference and the polarity difference between the original H, V signals can completely be maintained.
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