发明名称 HIGH-SPEED BUS INTERFACE FOR PERIPHERAL DEVICE AND PRODUCTION THEREOF
摘要 PROBLEM TO BE SOLVED: To enable reduction in circuit cost, power consumption and occupancy space on a printed circuit board. SOLUTION: A computer 202 is connected via a bus 203 to a peripheral device. The peripheral device has a process device part 220 and an I/O device part 206. The I/O device part 206 is arranged on a single microchip and has a physical layer 208 and a data channel processor 210, and the process device part 220 is coupled to the single microchip. The speed of the physical layer 208 and the data channel processor 210 is controlled by a single oscillator 250, and dedicated frequency dividers 212 and 214 are respectively arranged. By the use of interface controllers 218 and 226, the I/O device part 206 and the process device part 220 are connected via a single channel.
申请公布号 JP2000172621(A) 申请公布日期 2000.06.23
申请号 JP19990296987 申请日期 1999.10.19
申请人 HITACHI LTD 发明人 TSUNODA MOTOYASU;YAMAMOTO TATSUO
分类号 G06F13/10;G06F3/06;(IPC1-7):G06F13/10 主分类号 G06F13/10
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