发明名称 MEMORY BACKUP SYSTEM
摘要 PROBLEM TO BE SOLVED: To provide a memory backup system which can cope with even when a power supply is interrupted. SOLUTION: When a CPU 1 has a runaway and the supply of an access signal (a) is stopped to a WDT 6, a DMA controller 7 separates the CPU 1 from a CPU bus 9 via a gate circuit 5 and then sends the data to a flash memory 4 from a RAM 3. Then no power interruption is confirmed, a reset signal (e)is outputted to the CPU 1. If the power interruption is confirmed, a power supply monitoring circuit 8 outputs a power interruption signal (g)to the controller 7 and sends the RAM data to the memory 4. When the signal (g)is over, the signal (e) is outputted to the CPU 1. The CPU 1 sends the data saved in the memory 4 to the RAM 3 after the initialization is over.
申请公布号 JP2000172575(A) 申请公布日期 2000.06.23
申请号 JP19980346471 申请日期 1998.12.07
申请人 NEC ENG LTD 发明人 SHIMIZU TOSHIYUKI
分类号 G06F12/16 主分类号 G06F12/16
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