发明名称 DCT ARITHMETIC DEVICE
摘要 <p>A DCT arithmetic device for performing at least either DCT arithmetic operation or inverse DCT arithmetic operation of unit blocks having different sizes of image data. The DCT arithmetic device comprises a bit slice circuit (102) for shift-outputting every bit of pixel data inputted in units of one row or line, a first butterfly computation circuit (103) for butterfly-computing the output of the bit slice circuit (102), a ROM address generating circuit (104) for generating consecutive ROM addresses according to the output of the first butterfly computation circuit (103), an RAC (105) for reading data corresponding to the ROM addresses from ROMs (ROM0 to ROM7) and allowing accumulating circuits (51a to 51h) to accumulate the data, and a second butterfly computation circuit (106) for butterfly-computing the output of the RAC (105).</p>
申请公布号 WO0036842(A1) 申请公布日期 2000.06.22
申请号 WO1999JP07003 申请日期 1999.12.14
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.;OOHASHI, MASAHIRO;NAKAMURA, TSUYOSHI 发明人 OOHASHI, MASAHIRO;NAKAMURA, TSUYOSHI
分类号 G06F17/14;H04N19/42;H04N19/60;H04N19/625;(IPC1-7):H04N7/30;H04N1/41 主分类号 G06F17/14
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