发明名称 METHODS FOR CONFIGURING FPGA'S HAVING VARIABLE GRAIN BLOCKS AND SHARED LOGIC FOR PROVIDING TIME-SHARED ACCESS TO INTERCONNECT RESOURCES
摘要 <p>A Variable Grain Architecture (VGA) includes a shared output component (SOC) that may be used for outputting different signals onto a shared longline within an FPGA. Plural VGB's make shared use of the SOC to out respective function signals to the shared longline.</p>
申请公布号 WO2000036746(A1) 申请公布日期 2000.06.22
申请号 US1999029971 申请日期 1999.12.15
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