Clock distribution via suppressed carrier to reduce EMI

摘要

In a computer or other digital system a clock or other synchronous signal (12) is routed from a source (16) to a destination (18) as a double side band suppressed carrier (DSB-SC) signal (14). The clock or other synchronous signal is amplitude modulated at the source using a broadband low frequency envelope signal (20). The modulated signal is the DSB-SC signal, which then is routed over PC board traces (15) to the destination. At the destination, the DSB-SC signal is demodulated to achieve the clock or other synchronous signal (60). The envelope signal (20,20') is separately generated from a common key (72) at both the source and destination, is routed to bother the source to the destination, or is routed from the source to the destination.