Semiconductor device having multilayer metal interconnection

摘要

An n-type diffused layer is formed in a p-type semiconductor substrate. A control gate electrode of a memory cell MC is connected with a metal interconnect of a first layer and the metal interconnect is connected with the diffused layer. Moreover, a metal interconnect of the first layer is connected with a metal interconnect of a second layer. An interconnect of the second layer is connected with the output node of a row decoder.