发明名称 Method for forming a DRAM having improved capacitor dielectric layers
摘要 A method of fabricating a DRAM device having nitride/oxide or tantalum pentoxide dielectric layers. The method includes: forming field oxide regions on a substrate to define active regions; forming at each active region a MOSFET comprising a top dielectric layer; forming a contact window in the MOSFET top dielectric layer; generating a doped poly-Si bottom electrode of a capacitor in electrical connection with the MOSFET through the contact window; removing surface oxide of the bottom electrode using both chemical and inductive coupled plasma (ICP) treatments; depositing nitride/oxide dielectric layers or a tantalum pentoxide dielectric layer on the ICP-treated bottom electrode; generating a doped poly-Si top electrode of the capacitor.
申请公布号 US6077737(A) 申请公布日期 2000.06.20
申请号 US19980089015 申请日期 1998.06.02
申请人 MOSEL VITELIC, INC. 发明人 YANG, MING-TA;CHU, CHIH-HSUN
分类号 H01L21/02;H01L21/314;H01L21/316;H01L21/8242;(IPC1-7):H01L21/824 主分类号 H01L21/02
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