Non-volatile semiconductor memory device

摘要

A non-volatile memory device of the present invention comprises a memory cell array having a plurality of cells, a plurality of dummy bit lines, a plurality of dummy word lines. At least one of the dummy bit lines includes a bulk tapping for applying bulk voltage. Here, P+ impurity is implanted into the dummy bit lines. With this improved memory structure, a device layout area can be reduced and an increase in bulk voltage resulting from hot carriers can be suppressed.