发明名称 Method of fabricating a daul damascene structure
摘要 A method is provided for fabricating a dual damascene structure on a substrate with a first dielectric layer, an etching stop layer, a second dielectric layer, and a hard mask layer formed on it. The first step is to define the hard mask layer in order to form the first hole, which corresponds to the position of the conductive layer exposing the second dielectric layer. Then, an etching process, including an etching step with medium SiO2/SiN etching selectivity and an over-etching step with high SiO2/SiN etching selectivity, is performed to form the second hole and the third hole. Finally, a glue/barrier layer and a metal layer are filled into the second hole and the third hole, thus accomplishing a dual damascene structure.
申请公布号 US6077769(A) 申请公布日期 2000.06.20
申请号 US19980072311 申请日期 1998.05.04
申请人 UNITED MICROELECTRONICS CORP. 发明人 HUANG, YIMIN;LIN, TONY;YEW, TRI-RUNG
分类号 H01L21/768;(IPC1-7):H01L21/476 主分类号 H01L21/768
代理机构 代理人
主权项
地址