| 摘要 |
Method for increasing data-processing speed in computer systems containing at least one microprocessor, a memory device, and a so-called cache connected to the processor, in which the cache is arranged to fetch data from the addresses in the memory device requested by the processor and then also fetches data from one or several addresses in the memory device not requested by the processor. The computer system includes a circuit called the stream-detection circuit, connected to interact with a cache such that the stream-detection circuit detects the addresses which the processor requests in the cache and registers whether the addresses requested already existed in cache. The stream-detection circuit is arranged such that it is made to detect one or several sequential series of addresses requested by the processor in the cache. Additionally, the stream-detection circuit, upon detection of such a series, is structured to command the cache to fetch data from the memory device corresponding to the next address in the series and insert the address in the cache.
|
